[Coursera] VLSI CAD: Logic to Layout by Rob A. Rutenbar (University of Illinois at Urbana-Champaign)
Coursera

10 day statistics (3 downloads)
Average Time 6 mins, 30 secs
Average Speed 3.68MB/s
Best Time 1 mins, 49 secs
Best Speed 13.18MB/s
Worst Time 8 mins, 52 secs
Worst Speed 2.70MB/s

Send Feedback Start
   0.000008
DB Connect
   0.000631
Lookup hash in DB
   0.000546
Get torrent details
   0.000152
Get torrent details, finished
   0.000348
Get authors
   0.000019
Parse bibtex
   0.000070
Write header
   0.000284
get stars
   0.000134
home tab
   0.000612
render right panel
   0.000008
render ads
   0.000482
fetch current hosters
   0.000369
Start get stats
   0.000563
End get stats
   0.000008
related datasets
   0.006300
Done